PCIe 5.0 is just starting to hit new PCs, but version 6.0 is already here

PCIe 6.0's ability to interact with all older versions of the standard is a pride for PCI-SIG.
Enlarge / PCIe 6.0’s ability to interact with all older versions of the standard is a pride for PCI-SIG.

PCI-SIG

The PCI Special Interest Group (PCI-SIG) has finalized version 6.0 of the PCI Express standard, the communication bus that allows everything inside your computer to communicate. The new version of the specification comes about three years after the PCI Express 5.0 specification was finalized, and version 6.0 again doubles the bandwidth of a 32 GT / s PCIe lane (8 GB / s total, or 4 GB / s in each direction) at 64 GT / s (16 GB / s or 8 GB / s in each direction). For a full 16-lane PCIe 6.0 connection, this represents up to 256 Gb / s of total bandwidth, compared to the 32 Gb / s or 64 Gb / s of PCIe 3.0 and 4.0 connections now popular.

Like previous versions of PCIe, PCIe 6.0 will “interoperate and maintain backward compatibility” with all existing PCIe versions, so your PCIe 4.0 GPU or SSD will continue to operate in a PCIe 6.0 slot and vice versa. The PCI-SIG has boasted of the longevity of the specification in a blog post By Debendra Das Sharma, PCI-SIG Board Member: “An interconnect technology is considered successful if it can support three generations of bandwidth improvement over a decade. The PCIe architecture has far exceeded this mark. “

PCI Express speeds compared.  Note that these bandwidth numbers are bidirectional: if you only send or receive data, you will only have half the bandwidth.
Enlarge / PCI Express speeds compared. Note that these bandwidth numbers are bidirectional: if you only send or receive data, you will only have half the bandwidth.

PCI-SIG

To increase its speeds, PCIe 6.0 uses a new type of signaling called “Pulse Amplitude Modulation 4” (PAM4), which allows faster data transfers than previous Non-Return-To-Zero (NRZ) signaling at the expense of an error rate. To compensate, PCIe 6.0 includes technologies such as Forward Error Correction (FEC) to correct errors and Cyclic Redundancy Check (CRC) to request retransmission of packets when errors cannot be corrected. The PCI-SIG indicates that this combination of technologies should detect all errors without adding latency to the connection.

Mainstream systems are just starting to support PCI Express 5.0: Intel’s 12th Generation Core processors provide 16 PCIe 5.0 lanes and AMD plans to support PCIe 5.0 with its upcoming Zen 4 architecture and Ryzen 7000 series processors For now, PCIe 4.0 remains the most widely used version of the specification for high-end SSDs and current generation GPUs, and most budget PCIe SSDs still use PCI Express 3.0, which is more widely supported. by older systems and is still very fast for most things. The PCI-SIG recognizes in its PCIe 6.0 FAQ that the bandwidth of the new specification is not needed for most mainstream applications, instead touting it as an upgrade for data centers and artificial intelligence and machine learning systems.

PCI-SIG expects PCIe 6.0 products to begin hitting the market within 12 to 18 months.

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